In-circuit test probe access to printed circuit assemblies has been significantly reduced based at least in part on shrinking pin pitch on the device package and the use of sockets for second level attachment of the device package to high pin count components. To overcome probe access problems, boundary scan is a technique employed to test a component. However, boundary scan test techniques require power to be applied to the component being tested while testing is in progress. Thus, if there is a short circuit condition associated with the component, short and/or long term reliability of the component is at risk of being compromised. Further, with typical boundary scan rates of 10 MHz-15 MHz, the damaging condition is present on the component for extended periods of time.